12/2006 : Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip

RR Number

12/2006

Comment

Long Version of EDDC-6 Submission

Author(s)

Matthias Fuegger, Ulrich Schmid, Gottfried Fuchs, Gerald Kempf

Abstract

This paper introduces a simple fault-tolerant tick generation algorithm based on Srikanth & Toueg's consistent broadcast primitive that can be directly implemented in VLSI using asynchronous digital logic. The need for adaptions originates from two peculiarities of hardware implementations: (i) Fine-grained parallel asynchronous computations, which undermines the concept of atomic steps common to all distributed computing models, and (ii) very limited resources, which makes even apparently simple operations prohibitively costly. We prove that the resulting algorithm is correct, give analytic expressions for performance metrics like worst case precision and accuracy. Moreover, we outline the major building blocks of our synthesizable VHDL implementation and provide some measurement results from our FPGA prototype. Our results hence provide the required basis for investigating robust alternatives to synchronous clocking in VLSI Systems-on-Chip and similar applications.

Bibtex

@techreport{FSFK06:darts,
  author =       "Matthias Fuegger and Ulrich Schmid and Gottfried Fuchs and Gerald Kempf",
  title =        "Fault-Tolerant Distributed Clock Generation in VLSI Systems-on-Chip",
  institution =  "Technische Universit{\"a}t Wien, Institut f{\"u}r Technische Informatik",
  address =      "Treitlstr. 1-3/182-2, 1040 Vienna, Austria",
  type =         "Research Report",
  year =         "2006",
  number =       "12/2006"
}

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