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77/2006 : Analysis of Constraints in a Fault-Tolerant Distributed Clock Generation Scheme

RR Number
77/2006
Conference
3rd International Workshop on Dependable Embedded Systems (WDES'06)
Author(s)
Gottfried Fuchs, Matthias Fuegger, Andreas Steininger, Franz Zangerl
Abstract
In the course of our DARTS project we are pursuing a new fault-tolerant clock generation scheme targeted at Systems-on-Chip. The idea is to take existing distributed fault-tolerant partially synchronous algorithms and adapt them to the peculiarities of hardware. In this paper we take a closer look at general constraints that arise from these adaptations and provide formal proofs for their correctness.
Bibtex
@article{ fuchs:2006-77,
  author =       "Gottfried Fuchs and Matthias Fuegger and Andreas Steininger and Franz Zangerl",
  title =        "Analysis of Constraints in a Fault-Tolerant Distributed Clock Generation Scheme",
  journal =      "3rd International Workshop on Dependable Embedded Systems (WDES'06)",
  year =         "2006",
  month =        "Oct."
}
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