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2006 : Design of an FPGA-Based Time-Triggered Ethernet System

Author(s)
Klaus Steinhammer
Abstract
Today, the use of computer control systems in vehicles, airplanes, and factory control systems is common practice. The recent trend of integrating more and more control networks as well as service network accesses into an integrated broadband network demands a more rigorous network approach that provides real-time communication guarantees to support the integration efforts, to enable additional new functionality requiring increased bandwidth on the same network, and to provide a common service access point for loading and diagnosis activities all on the same network. In addition, legacy network components need to be able to be re-used in the new network approach. An essential requirement for such a distributed system is determinism despite integration and high network loads in normal and abnormal situations. Non-determinism in a network complicates redundancy management and requires considerable overhead for known systematic approaches to achieve dependable system behavior, such as voting of multiple sources. Deterministic behavior also alleviates integration testing and identification of abnormal network component behavior. In the past, time-triggered solutions have been perceived as too rigid because the regular traffic pattern does not well match some sporadic application needs and if mapped into the regular traffic pattern of time-triggered traffic often lead to poor bandwidth utilization. The network market demanded a solution that efficiently supports different traffic type requirements, namely regular control system traffic with tight jitter requirement and sporadic traffic with high bandwidth needs. TT Ethernet distinguishes between two message classes: the real-time message class and the non-real-time message class. The non-real-time messages are in full conformance to the IEEE 802.3 Ethernet standard and allow the integration of standard Ethernet devices within a TT Ethernet network without applying any changes of the connected devices. Real-time messages are scheduled and the transmission is triggered by the flow of realtime. To achieve a deterministic behavior a real-time message transmission service has to guarantee a nearly constant transmission delay with small and bounded jitter. In order to avoid that non-real-time traffic affects the temporal properties of real-time traffic, a real-time message preempts all non-real-time messages which are in its transmission path. The non-real-time messages are retransmitted autonomously by the TT Ethernet switch after the real-time message has been sent. The objective of this thesis is to develop a design of a TT Ethernet switch and a TT Ethernet communication controller. Based on these designs prototypical implementations of these devices are built. A TT Ethernet system composed of these devices is evaluated. The results of the experiments show that the requirements described above are met.
Bibtex
@phdthesis{ steinhammer:2006,
  author =      "Klaus Steinhammer",
  title =       "{Design of an FPGA-Based Time-Triggered Ethernet System}",
  address =     "Treitlstr. 3/3/182-1, 1040 Vienna, Austria",
  school =      "Technische Universit{\"a}t Wien, Institut f{\"u}r Technische Informatik",
  year =        "2006"
}
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