47/2011 : On Self-Timed Circuits in Real-Time Systems

RR Number

47/2011

Conference

International Journal of Reconfigurable Computing: Selected Papers from the International Workshop on Reconfigurable Communication-Centric Systems on Chips (ReCoSoC’ 2011)

Author(s)

Markus Ferringer

Abstract

While asynchronous logic has many potential advantages compared to traditional synchronous designs, one of the major drawbacks is its unpredictability with respect to temporal behavior. Having no high-precision oscillator, a self-timed circuit’s execution speed is heavily dependent on temperature and supply voltage. Small fluctuations of these parameters already result in noticeable changes of the design’s throughput and performance. Without further provisions this jitter makes the use of asynchronous logic hardly feasible for real-time applications. We investigate the temporal characteristics of self-timed circuits regarding their usage in real-time systems, especially the Time-Triggered Protocol. We propose a simple timing model and elaborate a self-adapting circuit which shall derive a suitable notion of time for both bit transmission and protocol execution. We further introduce and analyze our jitter compensation concept, which is a three-fold mechanism to keep the asynchronous circuit’s notion of time tightly synchronized to the remaining communication participants. To demonstrate the robustness of our solution, we perform different tests, and investigate their impact on jitter and frequency stability.

Bibtex

@article{ ferringer:2011-47,
  author =       "Markus Ferringer",
  title =        "On Self-Timed Circuits in Real-Time Systems",
  journal =      "International Journal of Reconfigurable Computing: Selected Papers from the International Workshop on Reconfigurable Communication-Centric Systems on Chips (ReCoSoC’ 2011)",
  year =         "2011",
  month =        "Feb."
}

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