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2001 : Transparent Fault Tolerance in a Time-Triggered Architecture

Author(s)
GŁnther Bauer
Abstract
The constantly decreasing price/performance ratio of digital microcontrollers enables system engineers to replace traditional electro-mechanical control devices by digital control systems. Digital control saves costs and weight, introduces additional functionality, and allows for scalable reliability. This last point justifies the use of digital control in safety-critical applications like airborne systems and computer-controlled cars where reliability requirements can only be met if fault tolerance is introduced.

The introduction of fault tolerance, however, increases the complexity of the digital control system and, thus, the costs for development, verification, and certification. In particular, the use of a proprietary fault tolerance layer requires renewed verification and certification of fault-tolerance mechanisms if applications are subject to changes.

This thesis presents a generic fault tolerance layer, which can be transparent to applications in both the time and the value domain. Transparency allows application design and implementation without having to be concerned with redundancy issues. Further, generic fault tolerance services may be verified and certified once for all possible applications. These properties contribute to a reduction of the time-to-market period and, consequently, save development costs.

To achieve transparency in both the time and the value domain, this fault tolerance layer is based on a time-triggered computing paradigm. We will show how the properties of a time-triggered computing and communications environment support the design of transparent fault tolerance in the value domain. Further, we will demonstrate that a time-triggered approach allows temporal de-composition of components thus enabling transparent fault tolerance in the time domain. Finally, as a proof of concept, we will present a prototype implementation of the fault tolerance layer based on the time-triggered communications protocol TTP/C.

Bibtex
@phdthesis{ bauer:2001,
  author =      "G√ľnther Bauer",
  title =       "Transparent Fault Tolerance in a Time-Triggered Architecture",
  address =     "Treitlstr. 3/3/182-1, 1040 Vienna, Austria",
  school =      "Technische Universit{\"a}t Wien, Institut f{\"u}r Technische Informatik",
  year =        "2001"
}
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